# Operating Systems | Set 3

In this article, we are going to discuss the Previous year’s Questions about Operating Systems that are asked in the GATE examination. Solutions to these questions are also provided with this question.

1. Which of the following is NOT a valid deadlock prevention scheme? (GATE CS 2000)

(A) Release all resources before requesting a new resource

(B) Number the resources uniquely and never request a lower numbered resource than the last one requested.

(C) Never request a resource after releasing any resource

(D) Request that all required resources be allocated before execution

Solution: The correct answer is (C).

2. Let m[0]…m[4] be mutexes (binary semaphores) and P[0] …. P[4] be processes. Suppose each process P[i] executes the following:

`  wait (m[i]); wait(m[(i+1) mode 4]);  ------  release (m[i]); release (m[(i+1)mod 4]);`

This could cause (GATE CS 2000)

(A) Thrashing

(D) None of the above

Explanation: You can easily see a deadlock in a situation where… P[0] has acquired m[0] and waiting for m[1] P[1] has acquired m[1] and waiting for m[2] P[2] has acquired m[2] and waiting for m[3] P[3] has acquired m[3] and waiting for m[0].

3. A graphics card has an onboard memory of 1 MB. Which of the following modes can the card not support? (GATE CS 2000)

(A) 1600 x 400 resolution with 256 colors on a 17-inch monitor

(B) 1600 x 400 resolution with 16 million colors on a 14-inch monitor

(C) 800 x 400 resolution with 16 million colors on a 17-inch monitor

(D) 800 x 800 resolution with 256 colors on a 14-inch monitor

Explanation: Monitor size doesnâ€™t matter here. So, we can easily deduce that the answer should be (b) as this has the highest memory requirements. Let us verify it. The number of bits required to store a 16M colors pixel = ceil(log2(16*1000000)) = 24 Number of bytes required for 1600 x 400 resolution with 16M colors = (1600 * 400 * 24)/8 which is 192000000 (greater than 1MB).

4 Consider a virtual memory system with a FIFO page replacement policy. For an arbitrary page access pattern, increasing the number of page frames in the main memory will (GATE CS 2001)

(A) Always decrease the number of page faults

(B) Always increase the number of page faults

(C) Sometimes increase the number of page faults

(D) Never affect the number of page faults

Explanation: Incrementing the number of page frames doesn’t always decrease page faults (Beladyâ€™s Anomaly).

5. Which of the following requires a device driver? (GATE CS 2001)

(A) Register

(B) Cache

(C) Main memory

(D) Disk

6. Suppose the time to service a page fault is on average 10 milliseconds, while a memory access takes 1 microsecond. Then a 99.99% hit ratio results in an average memory access time of (GATE CS 2000)

(A) 1.9999 milliseconds

(B) 1 millisecond

(C) 9.999 microseconds

(D) 1.9999 microseconds

Explanation: Average memory access time = [(% of page miss)*(time to service a page fault) + (% of page hit)*(memory access time)]/100. So, the average memory access time in microseconds is (0.01*10*1000 + 99.99*1)/100 = (100+99.99)/100 = 199.99/100 =1.9999 Âµs.

7. Which of the following need not necessarily be saved on a context switch between processes? (GATE CS 2000)

(A) General purpose registers

(B) Translation look-aside buffer

(C) Program counter

(D) All of the above

Explanation: In a process context switch, the state of the first process must be saved somehow, so that, when the scheduler gets back to the execution of the first process, it can restore this state and continue. The state of the process includes all the registers that the process may be using, especially the program counter, plus any other operating system-specific data that may be necessary. A Translation look-aside buffer (TLB) is a CPU cache that memory management hardware uses to improve virtual address translation speed. A TLB has a fixed number of slots that contain page table entries, which map virtual addresses to physical addresses. On a context switch, some TLB entries can become invalid, since the virtual-to-physical mapping is different. The simplest strategy to deal with this is to completely flush the TLB.

8. Where does the swap space reside? (GATE 2001)

(A) RAM

(B) Disk

(C) ROM

(D) On-chip cache

Explanation: Swap space is an area on the disk that temporarily holds a process memory image. When physical memory demand is sufficiently low, process memory images are brought back into physical memory from the swap area. Having sufficient swap space enables the system to keep some physical memory free at all times.

9. Which of the following does not interrupt a running process? (GATE CS 2001)

(A) A device

(B) Timer

(C) Scheduler process

(D) Power failure

Explanation: The scheduler process doesn’t interrupt any process, its Job is to select the processes for the following three purposes. Long-term scheduler(or job scheduler) â€“selects which processes should be brought into the ready queue. Short-term scheduler(or CPU scheduler) â€“selects which process should be executed next and allocates CPU. Mid-term Scheduler (Swapper)- present in all systems with virtual memory, temporarily removes processes from main memory and places them on secondary memory (such as a disk drive) or vice versa. The mid-term scheduler may decide to swap out a process that has not been active for some time, a process that has a low priority, a process that is page faulting frequently, or a process that is taking up a large amount of memory in order to free up main memory for other processes, swapping the process back in later when more memory is available, or when the process has been unblocked and is no longer waiting for a resource.

10. Which of the following scheduling algorithms is non-preemptive? (GATE CS 2002)

(A) Round Robin

(B) First-In First-Out

(C) Multilevel Queue Scheduling

(D) Multilevel Queue Scheduling with Feedback