Non Programmable I/O Ports- Intel 8212
Input and output ports can be categorized into Programmable ports and Non-programmable ports.
Programmable ports are those which require software changes to alter their functioning, while as, Non-Programmable I/O ports are those which can not be altered functionally easily. In order to change functions of Non-programmable ports, we require to make changes in its hardware components or sometimes change entire wiring. These Non-programmable ports have a simple design.
Intel 8212 :
Intel 8212 is one such popular Non-programmable I/O port which is available as chip with 24 pins as Dual Inline Package. Basic structure is given below:
The detailed pin diagram of 8212 is given below:
8212 requires continuous +5V DC supply to operate. The information is received by 8-bit latch present on 8 data input pins ranging from DI0 to DI7 and information is latched on conditions present on these data input pins, depending upon state of MD pin. The information that is latched comes out on 8-bit data output pins, ranging from DO0-DO7. Condition to be satisfied for latching data out via data output pins is present on mode pin (MD).
There is an edge triggered D flip flop which is called as service request flip flop and it is responsible for placing interrupt requests on INTR pin, which is active low pin.
General functioning of pins :
|VCC||It is +5V DC supply.|
|SD1/SD||These are select device pins.|
|DI7-DI0||These are 8 data input pins ranging from D7 to D0.|
|DO7-DO0||These are 8 data output pins ranging from D7 to D0.|
|STB||It is input strobe pin.|
|MD||It is input mode pin. When low i.e., MD=0, STR acts as an i/p clock signal to latch. When high i.e., MD=1, CS (chip select) acts as input clock.|
|INTR||It is active low interrupt output pin that places interrupt signals on microprocessor.|
|CLR||It is active low pin that clears inputs.|
|GND||It is ground connection pin.|