Microprocessors: RISC and CISC | Set 2

A microprocessor is a processing unit on a single chip. It is an integrated circuit which performs the core functions of a computer CPU. It is a multipurpose programmable silicon chip constructed using Metal Oxide Semiconductor (MOS) technology which is clock driven and register based. It accepts binary data as input and provides output after processing it as per the specification of instructions stored in the memory. These microprocessors are capable of processing 128 bits at a time at the speed of one billion instructions per second.

Characterstics of a micro processor:

  • Instruction Set –
    Set of complete instructions that the microprocessor executes is termed as the instruction set.
  • Word Length –
    The number of bits processed in a single instruction is called word length or word size. Greater the word size, larger the processing power of the CPU.
  • System Clock Speed –
    Clock speed determines how fast a single instruction can be executed in a processor. The microprocessor’s pace is controlled by the System Clock. Clock speeds are generally measured in million of cycles per second (MHz) and thousand million of cycles per second (GHz). Clock speed is considered to be a very important aspect of predicting the performance of a processor.

Classification of Microprocessors:
Besides the classification based on the word length, the classification is also based on the architecture i.e. Instruction Set of the microprocessor. These are categorised into RISC and CISC.

  1. RISC:
    It stands for Reduced Instruction Set Computer. It is a type of microprocessor architecture that uses a small set of instructions of uniform length. These are simple instructions which are generally executed in one clock cycle. RISC chips are relatively simple to design and inexpensive.The setback of this design is that the computer has to repeatedly perform simple operations to execute a larger program having a large number of processing operations.
    Examples: SPARC, POWER PC etc.
  2. CISC:
    It stands for Complex Instruction Set Computer. These processors offer the users, hundreds of instructions of variable sizes. CISC architecture includes a complete set of special purpose circuits that carry out these instructions at a very high speed. These instructions interact with memory by using complex addressing modes. CISC processors reduce the program size and hence lesser number of memory cycles are required to execute the programs. This increases the overall speed of execution.
    Examples: Intel architecture, AMD
  3. EPIC:
    It stands for Explicitly Parallel Instruction Computing. The best features of RISC and CISC processors are combined in the architecture. It implements parallel processing of instructions rather than using fixed length instructions. The working of EPIC processors are supported by using a set of complex instructions that contain both basic instructions as well as the information of execution of parallel instructions. It substantially increases the efficiency of these processors.

Below are few differences between RISC and CISC:

A large number of instructions are present in the architecture. Very fewer instructions are present. The number of instructions are generally less than 100.
Some instructions with long execution times. These include instructions that copy an entire block from one part of memory to another and others that copy multiple registers to and from memory. No instruction with a long execution time due to very simple instruction set. Some early RISC machines did not even have an integer multiply instruction, requiring compilers to implement multiplication as a sequence of additions.
Variable-length encodings of the instructions.
Example: IA32 instruction size can range from 1 to 15 bytes.
Fixed-length encodings of the instructions are used.
Example: In IA32, generally all instructions are encoded as 4 bytes.
Multiple formats are supported for specifying operands. A memory operand specifier can have many different combinations of displacement, base and index registers. Simple addressing formats are supported. Only base and displacement addressing is allowed.
CISC supports array. RISC does not supports array.
Arithmetic and logical operations can be applied to both memory and register operands. Arithmetic and logical operations only use register operands. Memory referencing is only allowed by load and store instructions, i.e. reading from memory into a register and writing from a register to memory respectively.
Implementation programs are hidden from machine level programs. The ISA provides a clean abstraction between programs and how they get executed. Implementation programs exposed to machine level programs. Few RISC machines do not allow specific instruction sequences.
Condition codes are used. No condition codes are used.
The stack is being used for procedure arguments and return addresses. Registers are being used for procedure arguments and return addresses. Memory references can be avoided by some procedures.

Refer for Set-1: RISC and CISC

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