Microprocessor

Question 1

Which of the following addressing modes are suitable for program relocation at run time ?

(i)   Absolute addressing
(ii)  Based addressing
(iii) Relative addressing
(iv)  Indirect addressing

• (i) and (iv)
• (i) and (ii)
• (ii) and (iii)
• (i), (ii) and (iv)

Question 2

Direction for questions 63 to 64: Consider the following program segment for a hypothetical CPU having three user registers R1, R2 and R3.

 Instruction 	 Operation 	 Instruction Size(in words)
 MOV R1,5000; 	 R1 ¬ Memory[5000] 	 2
 MOV R2, (R1); 	 R2 ¬ Memory[(R1)] 	 1
 ADD R2, R3; 	 R2 ¬ R2 + R3 	         1
 MOV 6000, R2; 	 Memory [6000] ¬ R2 	 2
 HALT 	         Machine halts 	         1 

Consider that the memory is byte addressable with size 32 bits, and the program has been loaded starting from memory location 1000 (decimal). If an interrupt occurs while the CPU has been halted after executing the HALT instruction, the return address (in decimal) saved in the stack will be

• 1007
• 1020
• 1024
• 1028

Question 3

Directions for question 63 to 64: Consider the following program segment for a hypothetical CPU having three user registers R1, R2 and R3.

 Instruction 	 Operation 	 Instruction Size(in words)
 MOV R1,5000; 	 R1 ¬ Memory[5000] 	 2
 MOV R2, (R1); 	 R2 ¬ Memory[(R1)] 	 1
 ADD R2, R3; 	 R2 ¬ R2 + R3 	         1
 MOV 6000, R2; 	 Memory [6000] ¬ R2 	 2
 HALT 	         Machine halts 	         1

Let the clock cycles required for various operations be as follows: Register to/ from memory transfer: 3 clock cycles ADD with both operands in register : 1 clock cycle Instruction fetch and decode : 2 clock cycles per word The total number of clock cycles required to execute the program is

• 29

• 24

• 23

• 20

Question 4

The microinstructions stored in the control memory of a processor have a width of 26 bits. Each microinstruction is divided into three fields: a micro-operation field of 13 bits, a next address field (X), and a MUX select field (Y). There are 8 status bits in the inputs of the MUX. How many bits are there in the X and Y fields, and what is the size of the control memory in number of words?

• 10, 3, 1024
• 8, 5, 256
• 5, 8, 2048
• 10, 3, 512

Question 5

Consider the following assembly language program for a hypothetical processor. A, B, and C are 8 bit registers. The meanings of various instructions are shown as comments.

	MOV B, # 0	;	B ← 0
	MOV C, # 8	;	C ← 8
Z :	CMP C, # 0	;	compare C with 0
	JZX	;	jump to X if zero flag is set
	SUB C, # 1	;	C ← C - 1
	RRC A, # 1	;	right rotate A through carry by one bit. Thus:
		;	if the initial values of A and the carry flag are a7...a0 and
		;	c0 respectively, their values after the execution of this
		;	instruction will be c0a7...a1 and a0 respectively.
	JC Y	;	jump to Y if carry flag is set
	JMP Z	;	jump to Z
Y :	ADD B, # 1	;	B ← B + 1
	JMP Z	;	jump to Z
X :

• the number of 0 bits in A0
• the number of 1 bits in A0
• A0
• 8

Question 6

Consider the following assembly language program for a hypothetical processor. A, B, and C are 8 bit registers. The meanings of various instructions are shown as comments.

	MOV B, # 0	;	B ← 0
	MOV C, # 8	;	C ← 8
Z :	CMP C, # 0	;	compare C with 0
	JZX	;	jump to X if zero flag is set
	SUB C, # 1	;	C ← C - 1
	RRC A, # 1	;	right rotate A through carry by one bit. Thus:
		;	if the initial values of A and the carry flag are a7...a0 and
		;	c0 respectively, their values after the execution of this
		;	instruction will be c0a7...a1 and a0 respectively.
	JC Y	;	jump to Y if carry flag is set
	JMP Z	;	jump to Z
Y :	ADD B, # 1	;	B ← B + 1
	JMP Z	;	jump to Z
X :

Which of the following instructions when inserted at location X will ensure that the value of register A after program execution is the same as its initial value ?

• RRC A, #
• NOP ; no operation
• LRC A, # 1 ; left rotate A through carry flag by one bit
• ADD A, # 1

Question 7

A device employing INTR line for device interrupt puts the CALL instruction on the data bus while

		 
A)       is active
B)	HOLD is active
C)	READY is active
D)	None of these

• A
• B
• C
• D

Question 8

In 8085, which of the following modifies the program counter ?

• Only PCHL instruction
• Only ADD instructions
• Only JMP and CALL instructions
• All instructions

Question 9

In the absolute addressing mode

• the operand is inside the instruction
• the address of the operand is inside the instruction
• the register containing address of the operand is specified inside the instruction
• the location of the operand is implicit

Question 10

What are the states of the Auxiliary Carry (AC) and Carry Flag (dCY) after executing the following 8085 program?

   MVI L, 5DH
   MVI L, 6BH
   MOV A, H
   ADD L

• AC = 0 and CY = 0
• AC = 1 and CY = 1
• AC = 1 and CY = 0
• AC = 0 and CY = 0