ISRO | ISRO CS 2020 | Question 78

A computer which issues instructions in order, has only 2 registers and 3 opcodes ADD, SUB and MOV. Consider 2 different implementations of the following basic block:

Case 1            Case 2
t1 = a + b;      t2 = c + d;
t2 = c + d;      t3 = e – t2;
t3 = e – t2;     t1 = a + b;
t4 = t1 – t2;    t4 = t1 – t2; 

Assume that all operands are initially in memory. Final value of computation also has to reside in memory. Which one is better in terms of memory accesses and by how many MOV instructions ?

(A)

Case 2, 2

(B)

Case 2, 3

(C)

Case 1, 2

(D)

Case 1, 3

(E)

None of these

Answer: (E)

Explanation:

Explanation:

To determine which implementation is better in terms of memory accesses and the number of MOV instructions, let’s analyze each case:

Case 1:

1. t1 = a + b: This requires two memory accesses to fetch the values of ‘a’ and ‘b’, and one ADD instruction.
2. t2 = c + d: Two memory accesses for ‘c’ and ‘d’, and one ADD instruction.
3. t3 = e – t2: One memory access for ‘e’, one MOV instruction to copy the value of t2 to a register, and one SUB instruction.
4. t4 = t1 – t2: One MOV instruction to copy the value of t1 to a register, one MOV instruction to copy the value of t2 to a register, and one SUB instruction.

In Case 1, there are a total of 5 memory accesses and 2 MOV instructions.

Case 2:

1. t2 = c + d: Two memory accesses for ‘c’ and ‘d’, and one ADD instruction.
2. t3 = e – t2: One memory access for ‘e’, one MOV instruction to copy the value of t2 to a register, and one SUB instruction.
3. t1 = a + b: Two memory accesses for ‘a’ and ‘b’, and one ADD instruction.
4. t4 = t1 – t2: One MOV instruction to copy the value of t1 to a register, one MOV instruction to copy the value of t2 to a register, and one SUB instruction.

In Case 2, there are a total of 5 memory accesses and 2 MOV instructions.

Both cases have the same number of memory accesses and MOV instructions.

Therefore, the answer is (E) None of these.

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