ADD Ra, Rb, Rr Add Ra to Rb and store the result in Rr MUL Ra, Rb, Rr Multiply Ra to Rb and store the result in RrMUL operations takes two clock cycles, ADD takes one clock cycle. Calculate minimum number of clock cycles required to compute the value of the expression XY + XYZ + YZ. The variables X, Y, Z are initially available in registers R0, R1 and R2 and contents of these registers must not be modified.
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Answer
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