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ISRO | ISRO CS 2013 | Question 35
  • Last Updated : 15 May, 2018

In 8085 microprocessor, the ISR for handling trap interrupt is at which location?
(A) 3CH
(B) 34H
(C) 74H
(D) 24H


Answer: (D)

Explanation: TRAP has the highest priority in all the interrupts. TRAP can not be masked but it can be delayed using HOLD signal. This interrupt transfers the microprocessor’s control to location 0024H.

Option (D) is correct.

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