ISRO CS 2014


Question 1
Consider a 33 MHz CPU based system. What is the number of wait states required if it is interfaced with a 60 ns memory? Assume a maximum of 10 ns delay for additional circuitry like buffering and decoding.
A
0
B
1
C
2
D
3
Computer Organization and Architecture    ISRO CS 2014    Pipelining and Addressing modes    
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Question 1 Explanation: 
A wait state is a delay experienced by a computer processor when accessing external memory or another device that is slow to respond. Total memory access time = 60 ns + 10 ns = 70 ns. Given, CPU frequency = 33 MHz So, 1 clock time = 1 / (33 MHz) = (1/33)*10-6 = 30.30 ns. Therefore, Total number of wait states = Total number of cycle needed = 70 ns / (30.30 ns) = 2.31 ≈ 3 cycles. So, option (D) is correct.
Question 2
The number of states required by a Finite State Machine, to simulate the behavior of a computer with a memory capable of storing 'm' words, each of length 'n' bits is?
A
m x 2n
B
2m+n
C
2mn
D
m+n
Regular languages and finite automata    ISRO CS 2014    
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Question 2 Explanation: 
Given, 'm' words, each of length 'n' bits, so total number of bits = m*n A state of finite state automata can store 1 bit of data, and a state can have either 0 or 1. Therefore, total number of states required by a Finite State Machine = 2mn. So, option (C) is correct.
Question 3
What is the output of the following C program?
#include<stdio.h>
#define SQR(x) (x*x)
int main()
{
    int a;
    int b=4;
    a=SQR(b+2);
    printf("%dn",a);
    return 0;
}
A
14
B
36
C
18
D
20
C Macro & Preprocessor    ISRO CS 2014    
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Question 3 Explanation: 
#define SQR(x) (x*x) a = SQR(b+2); a = (b + 2*b + 2) = (4 + 2*4 + 2) = 14 So, option (A) is correct.
Question 4
Consider the following pseudo code
while (m < n)
   if (x > y ) and (a < b) then
      a=a+1
      y=y-1
   end if
   m=m+1 
end while 
What is cyclomatic complexity of the above pseudo code?
A
2
B
3
C
4
D
5
Software Engineering    ISRO CS 2014    
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Question 4 Explanation: 
Draw the Control Flow Graph (CFG) for given pseudo code: 22 Now, cyclomatic complexity:
= (number of edges) - (number of nodes) + 1 = 8-6+2 = 4
= Total number of regions = 4
= Total number of decision points + 1 = 3+1 = 4 
Note that decision points at a node = (total number of outgoing edges) - 1. So, option (C) is correct.
Question 5
What is the number of steps required to derive the string ((() ()) ())
S → SS
S → (S)
S → ε
A
10
B
15
C
12
D
16
Context free languages and Push-down automata    ISRO CS 2014    
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Question 5 Explanation: 
To generate ((() ()) ()) , following steps are needed:
1) S → (S)
2) S → (SS)
3) S → ((S)S)
4) S → ((SS)S)
5) S → (((S)S))S)
6) S → (((S)(S))S)
7) S → (((S)(S))(S))  [S → ε]  
8) S → ((()(S))S)     [S → ε]
9) S → ((()())S)      [S → ε]  
10) S → ((()()))
Option (A) is correct.
Question 6
The process of modifying IP address information in IP packet headers while in transit across a traffic routing device is called
A
Port address translation (PAT)
B
Network address translation (NAT)
C
Address mapping
D
Port mapping
Network Layer    ISRO CS 2014    
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Question 6 Explanation: 
Network address translation (NAT) is a method of remapping one IP address space into another by modifying network address information in the IP header of packets while they are in transit across a traffic routing device. Port Address Translation (PAT) is an extension to network address translation (NAT) that permits multiple devices on a local area network (LAN) to be mapped to a single public IP address. The goal of PAT is to conserve IP addresses. Address mapping (also know as pin mapping or geocoding) is the process of assigning map coordinate locations to addresses in a database. The output of address mapping is a point layer attributed with all of the data from the input database. Port mapping or port forwarding is an application of network address translation (NAT) which redirects a communication request from one address and port number combination to another while the packets are traversing a network gateway, such as a router or firewall. So, option (B) is correct.
Question 7
What does a pixel mask mean?
A
string containing only 1's
B
string containing only 0's
C
string containing two 0's
D
string containing 1's and 0’s
ISRO CS 2014    Computer Graphics    
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Question 7 Explanation: 
Pixel counts for the span length and interspan spacing can be specified in a pixel mask, which is a string containing the digits 1 and 0 to indicate which positions to plot along the line path. The mask 1111000, for instance, could be used to display a dashed line with a dash length of four pixels and an interdash spacing of three pixels. So, option (D) is correct.
Question 8
In the standard IEEE 754 single precision floating point representation, there is 1 bit for sign, 23 bits for fraction and 8 bits for exponent. What is the precision in terms of the number of decimal digits?
A
5
B
6
C
7
D
8
Number Representation    ISRO CS 2014    
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Question 8 Explanation: 
Precision can be understood as the maximum accuracy through which a floating point number can be represented. It is the smallest change that can be represented in floating point representation. The fractional part of a single precision normalized number has exactly 23 bits of resolution, (24 bits with the implied bit). In terms of decimal representation: let the number of digits in decimal digits be 'x' 2-23 = 10-x taking log log210-x = -23 -x log210 = -23 -3.322 x = -23 x = 6.92 So, correct answer is (C)
Question 9
Let be the radius of the circle. What is the angle subtended by an arc of length at the center of the circle?
A
1 degree
B
1 radian
C
90 degrees
D
π radians
General Aptitude    ISRO CS 2014    
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Question 9 Explanation: 
Radian describes the plane angle subtended by a circular arc as the length of the arc divided by the radius of the arc. One radian is the angle subtended at the center of a circle by an arc that is equal in length to the radius of the circle. 11 Note that 1 radian = 57.2958 degree. So, option (B) is correct.
Question 10
The number of logical CPUs in a computer having two physical quad-core chips with hyper threading enabled is
A
1
B
2
C
8
D
16
Computer Organization and Architecture    ISRO CS 2014    Secondary memory and DMA    
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Question 10 Explanation: 
Every physical CPU corresponds to 2 logical CPU in hyperthreading and there are 2 quad core chips. Therefore, total number of physical CPUs = 2*4 = 8 Now, 8 physical CPU corresponds to 2*8 = 16 logical CPU. Note that a multi-core processor is a single piece of hardware ("one processor") that provides several cores than can work concurrently. So, option (D) is correct.
There are 80 questions to complete.


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