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I2C Communication Protocol

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I2C stands for Inter-Integrated Circuit. It is a bus interface connection protocol incorporated into devices for serial communication. It was originally designed by Philips Semiconductor in 1982. Recently, it is a widely used protocol for short-distance communication. It is also known as Two Wired Interface(TWI).

Working of I2C Communication Protocol :
It uses only 2 bi-directional open-drain lines for data communication called SDA and SCL. Both these lines are pulled high.

Serial Data (SDA) – Transfer of data takes place through this pin.
Serial Clock (SCL) – It carries the clock signal.

I2C operates in 2 modes –

  • Master mode
  • Slave mode

Each data bit transferred on SDA line is synchronized by a high to the low pulse of each clock on the SCL line.

According to I2C protocols, the data line can not change when the clock line is high, it can change only when the clock line is low. The 2 lines are open drain, hence a pull-up resistor is required so that the lines are high since the devices on the I2C bus are active low. The data is transmitted in the form of packets which comprises 9 bits. The sequence of these bits are –

  1. Start Condition – 1 bit
  2. Slave Address – 8 bit
  3. Acknowledge – 1 bit

Start and Stop Conditions :

START and STOP can be generated by keeping the SCL line high and changing the level of SDA. To generate START condition the SDA is changed from high to low while keeping the SCL high. To generate STOP condition SDA goes from low to high while keeping the SCL high, as shown in the figure below.

Start and Stop Condition

Repeated Start Condition :

Between each start and stop condition pair, the bus is considered as busy and no master can take control of the bus. If the master tries to initiate a new transfer and does not want to release the bus before starting the new transfer, it issues a new START condition. It is called a REPEATED START condition.

Read/Write Bit :

A high Read/Write bit indicates that the master is sending the data to the slave, whereas a low Read/Write bit indicates that the master is receiving data from the slave. 


After every data frame, follows an ACK/NACK bit. If the data frame is received successfully then ACK bit is sent to the sender by the receiver.  

Addressing :

The address frame is the first frame after the start bit. The address of the slave with which the master wants to communicate is sent by the master to every slave connected with it. The slave then compares its own address with this address and sends ACK.

I2C Packet Format :

In the I2C communication protocol, the data is transmitted in the form of packets. These packets are 9 bits long, out of which the first 8 bits are put in SDA line and the 9th bit is reserved for ACK/NACK i.e. Acknowledge or Not Acknowledge by the receiver. 

 START condition plus address packet plus one more data packet plus STOP condition collectively form a complete Data transfer.

Features of I2C Communication Protocol :

  • Half-duplex Communication Protocol – 
    Bi-directional communication is possible but not simultaneously.
  • Synchronous Communication – 
    The data is transferred in the form of frames or blocks.
  • Can be configured in a multi-master configuration.
  • Clock Stretching – 
    The clock is stretched when the slave device is not ready to accept more data by holding the SCL line low, hence disabling the master to raise the clock line. Master will not be able to raise the clock line because the wires are AND wired and wait until the slave releases the SCL line to show it is ready to transfer next bit.
  • Arbitration – 
    I2C protocol supports multi-master bus system but more than one bus can not be used simultaneously. The SDA and SCL are monitored by the masters. If the SDA is found high when it was supposed to be low it will be inferred that another master is active and hence it stops the transfer of data.
  • Serial transmission – 
    I2C uses serial transmission for transmission of data.
  • Used for low-speed communication.

Advantages :

  • Can be configured in multi-master mode.
  • Complexity is reduced because it uses only 2 bi-directional lines (unlike SPI Communication).
  • Cost-efficient.
  • It uses ACK/NACK feature due to which it has improved error handling capabilities.

Limitations :

  • Slower speed.
  • Half-duplex communication is used in the I2C communication protocol.

Comparison between I2C and SPI Communication Protocols

FeaturesI2C Communication ProtocolSPI Communication Protocol
Number of wires 2 (SDA and SCL) 4 (MOSI, MISO, SCK, and SS)
Communication type Half-duplex Full-duplex
Maximum number of devices Limited by addressing scheme Limited by number of chip select (SS) lines
Data transfer speed SlowerFaster
Error handling Improved due to ACK/NACK feature Not as robust
CostCost-efficient due to fewer wires More expensive due to additional wires
ComplexitySimpler due to fewer wires More complex due to additional wires
Multi-master configuration YesYes
Synchronous communication YesYes
Clock stretching YesNo
Last Updated : 10 May, 2023
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