GATE | Sudo GATE 2020 Mock III (24 January 2019) | Question 37

Consider a system having a clock rate of 2 ns and miss penalty of 50 clock cycles. while accessing the data, 1% of instructions and 5% of data references are not found in the cache. Only 15% of memory access is for data and the system has cache access time (including hit detection) of 1 clock cycle. Also, assume that read and write penalty are same and ignore other write stalls.

What is average memory access time ?
(A) 1.4
(B) 2.4
(C) 2.6
(D) 3.6


Answer: (D)

Explanation:

1 clock cycle = 2 ns 

Average memory access time,

= Hit Time + Miss Rate * Miss Penalty 
= 1*2 + (0.01 * 0.85 + 0.05 * 0.15) * 50*2
= 3.6 ns 

Option (D) is correct.

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