GATE | Sudo GATE 2020 Mock I (27 December 2019) | Question 54

A computer responds to an interrupt request signal by pushing onto a full descending stack the contents of PC and the current PSW (program status word), assume that each one will need one word. It then reads a new PSW from memory from a location given by an interrupt address symbolized by IAD. The first address of the service program is taken from memory at location IAD+1. Note: TR (temporary register could be used).

Consider the following statements:

I. Sequence of micro-operations for the return from interrupt instruction:

SP ← SP-1
M[SP] ← PC
SP ← SP-1
M[SP] ← PSW
TR ← IAD
PSW ← M[TR]
TR ← TR + 1
PC ← M[TR]
Go to fetch phase. 

II. Sequence of micro-operations for the interrupt cycle:

PSW ← M[SP]
SP ← SP+1
PC ← M[SP]
SP ← SP+1

Which of the following option is correct?
(A) Only statement I is correct.
(B) Only statement II is correct.
(C) Both statement I and II are correct.
(D) Neither statement I nor II is correct.


Answer: (D)

Explanation:



I. Sequence of micro-operations for the return from interrupt instruction:

PSW ← M[SP]
SP ← SP+1
PC ← M[SP]
SP ← SP+1

II. Sequence of micro-operations for the interrupt cycle:

SP ← SP-1
M[SP] ← PC
SP ← SP-1
M[SP] ← PSW
TR ← IAD
PSW ← M[TR]
TR ← TR + 1
PC ← M[TR]
Go to fetch phase. 

So, option (D) is true.


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