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GATE | Gate IT 2008 | Question 35

  • Last Updated : 19 Nov, 2018

Consider the following state diagram and its realization by a JK flip flop


The combinational circuit generates J and K in terms of x, y and Q.
The Boolean expressions for J and K are :
(A) (x⊕y)’and x’⊕y’
(B) (x⊕y)’and x⊕y
(C) x⊕y and (x⊕y)’
(D) x⊕yand x⊕y

Answer: (D)


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