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# GATE | Gate IT 2008 | Question 14

• Last Updated : 19 Nov, 2018

A processor that has carry, overflow and sign flag bits as part of its program status word (PSW) performs addition of the following two 2’s complement numbers 01001101 and 11101001. After the execution of this addition operation, the status of the carry, overflow and sign flags, respectively will be:
(A) 1, 1, 0
(B) 1, 0, 0
(C) 0, 1, 0
(D) 1, 0, 1

Explanation:
01001101
+11101001
————-
100110110

Overflow flag is set only if the X-OR between the carry-into the sign bit and carry -out of the sign bit is 1.” that implies “if two binary numbers added with same sign and result has different sign then overflow possible otherwise not possible”. Also, “if two binary numbers added with different sign then carry possible otherwise not possible”.
In fact, carry bit assumed numbers are unsigned and overflow bit assumed numbers are signed representation.

Therefore,

carry flag =1,
overflow flag = 0,
sign bit = 0

Option (B) is correct.

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