GATE | GATE CS Mock 2018 | Set 2 | Question 57

The next state table of a 2 bit saturating up-counter is given below.

Gate_8

The counter is built as synchronous sequential circuit using D flip-flops. The value for D1 and D2 are



(A) D1 = Q0 + Q1
D2 = Q’0 + Q1
(B) D1 = Q’1Q0
D2 = Q’1 + Q’0
(C) D1 = Q’0 + Q1
D2 = Q0 + Q1
(D) None of these


Answer: (A)

Explanation: Since D = Q, so;

1

Using above excitation table,
D1 = Q0 + Q1
D2 = Q’0 + Q1

Option (A) is correct.

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