GATE | GATE CS Mock 2018 | Question 56

A cache memory unit with capacity of N words and block size of B words is to be designed. If it is designed as a 16-way set-associative cache, the length of the TAG field is 10 bits. If the cache unit is now designed as direct mapped cache, the length of the TAG field is ______ bits.

(A) 6
(B) 14
(C) 16
(D) None of these

Answer: (A)

Explanation: Set offset = Line offset / log(#sets)
→ Line offset = Set offset * log(#sets)

Therefore, tag bits will decreased by log(#sets) when we transform set-associative cache to direct mapped cache.

New tag bits = 10 – log (16) = 10 – 4 = 6

So, option (A) is correct.

Quiz of this Question

My Personal Notes arrow_drop_up
Article Tags :

Be the First to upvote.

Please write to us at to report any issue with the above content.