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GATE | GATE CS Mock 2018 | Question 24
  • Last Updated : 09 Jan, 2018

Consider 4-way set-associative cache memory has the following properties:

  • Data words are 32 bits each
  • A cache block will contain 2048 bits of data
  • The address supplied from the CPU is 32 bits long
  • There are 2048 blocks in the cache
  • Addresses are to the word

Number of bits in tag?

(A) 17
(B) 15
(C) 16
(D) None of the above


Answer: (A)

Explanation: – There are still 6 bits in the offset; data is word addressed
Number of bits in index?
– We now need one less bit of index because we address to the set
→ 2^11 blocks / 2^2 blocks/set = 2^9 sets
→ (9 bits of index needed)
Number of bits in tag?
→ 32 – 6 – 9 = 17 bits.

So, option (A) is correct.

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