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GATE | GATE CS 2018 | Question 45
The size of the physical address space of a processor is 2P bytes. The word length is 2W bytes. The capacity of cache memory is 2N bytes. The size of each cache block is 2M words. For a K-way set-associative cache memory, the length (in number of bits) of the tag field is
(A)
P − N − log2K
(B)
P − N + log2K
(C)
P − N − M − W − log2K
(D)
P − N − M − W + log2K
Answer
Please comment below if you find anything wrong in the above post
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