• Courses
  • Tutorials
  • Jobs
  • Practice
  • Contests

GATE | GATE CS 2018 | Question 15

A 32 - bit wide main memory unit with a capacity of 1 GB is built using 256M X 4-bit DRAM chips. The number of rows of memory cells in the DRAM chip is 214. The time taken to perform one refresh operation is 50 nanoseconds. The refresh period is 2 milliseconds. The percentage (rounded to the closest integer) of the time available for performing the memory read/write operations in the main memory unit is _______ . Note - This was Numerical Type question.

(A)

59

(B)

40

(C)

99

(D)

None of these

Answer

Please comment below if you find anything wrong in the above post
Feeling lost in the world of random DSA topics, wasting time without progress? It's time for a change! Join our DSA course, where we'll guide you on an exciting journey to master DSA efficiently and on schedule.
Ready to dive in? Explore our Free Demo Content and join our DSA course, trusted by over 100,000 geeks!

Last Updated :
Share your thoughts in the comments