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GATE | GATE CS 2011 | Question 21

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Consider a hypothetical processor with an instruction of type LW R1, 20(R2), which during execution reads a 32-bit word from memory and stores it in a 32-bit register R1. The effective address of the memory location is obtained by the addition of a constant 20 and the contents of register R2. Which of the following best reflects the addressing mode implemented by this instruction for operand in memory?


Immediate Addressing


Register Addressing


Register Indirect Scaled Addressing


Base Indexed Addressing

Answer: (D)


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Last Updated : 13 Aug, 2021
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