Interview Preparation
- Interview Preparation For Software Developers
- Must Coding Questions - Company-wise
- Must Do Coding Questions - Topic-wise
- Company-wise Practice Problems
- Company Preparation
- Competitive Programming
- Software Design-Patterns
- Company-wise Interview Experience
- Experienced - Interview Experiences
- Internship - Interview Experiences
Commerce
- Commerce
- Class 11 Accountancy Notes
- Class 12 Accountancy Notes
- Accountancy
- Class 11 Business Studies Notes
- Class 12 Business Studies Notes
- Business Studies
- Class 11 Microeconomics Notes
- Class 11 Statistics For Economics Notes
- Class 12 Macroeconomics Notes
- Class 12 Indian Economic Development Notes
- Economics
- Management
- Income Tax
- Finance
GATE | GATE CS 2008 | Question 77
Delayed branching can help in the handling of control hazards
The following code is to run on a pipelined
processor with one branch delay slot:
I1: ADD R2←R7+R8 I2 : SUB R4← R5-R6 I3 : ADD R1← R2+R3 I4 : STORE Memory [R4]←[R1] BRANCH to Label if R1== 0Which of the instructions I1, I2, I3 or I4 can legitimately occupy the delay slot without any other program modification?
(A)
I1
(B)
I2
(C)
I3
(D)
I4
Answer
Please comment below if you find anything wrong in the above post
Feeling lost in the world of random DSA topics, wasting time without progress? It's time for a change! Join our DSA course, where we'll guide you on an exciting journey to master DSA efficiently and on schedule.
Ready to dive in? Explore our Free Demo Content and join our DSA course, trusted by over 100,000 geeks!
Last Updated :
Share your thoughts in the comments
GeeksforGeeks