Consider a direct mapped cache of size 32 KB with block size 32 bytes. The CPU generates 32 bit addresses. The number of bits needed for cache indexing and the number of tag bits are respectively
(A) 10, 17
(B) 10, 22
(C) 15, 17
(D) 5, 17
Explanation: Cache is direct mapped
size of cache=32 KB =2 5* 2 10 Bytes=2 15 Bytes.
Require 15 bits for cache addressing so CPU address has tag and index No. of tag bits=32-15=17
From 15 cache addressing bits consist of blocks and words.
Each block has 32 words(bytes)
So require 5 bit.Index=block +word Block=15-5=10
Hence (A) is correct option.
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