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GATE | GATE-CS-2004 | Question 90
A 4-bit carry lookahead adder, which adds two 4-bit numbers, is designed using AND, OR, NOT, NAND, NOR gates only. Assuming that all the inputs are available in both complemented and uncomplemented forms and the delay of each gate is one time unit, what is the overall propagation delay of the adder? Assume that the carry network has been implemented using two-level AND-OR logic.
(A)
4 time units
(B)
6 time units
(C)
10 time units
(D)
12 time units
Answer
Please comment below if you find anything wrong in the above post
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