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GATE | GATE-CS-2003 | Question 47
Consider the following circuit composed of XOR gates and non-inverting buffers.
The non-inverting buffers have delays d1 = 2 ns and d2 = 4 ns as shown in the figure. Both XOR gates and all wires have zero delay. Assume that all gate inputs, outputs and wires are stable at logic level 0 at time 0. If the following waveform is applied at input A, how many transition(s) (change of logic levels) occur(s) at B during the interval from 0 to 10 ns ?
![GATECS2009Q47]("http://www.geeksforgeeks.org/wp-content/uploads/gq/2014/11/GATECS2009Q47.png")
The non-inverting buffers have delays d1 = 2 ns and d2 = 4 ns as shown in the figure. Both XOR gates and all wires have zero delay. Assume that all gate inputs, outputs and wires are stable at logic level 0 at time 0. If the following waveform is applied at input A, how many transition(s) (change of logic levels) occur(s) at B during the interval from 0 to 10 ns ?
![GATECS2009Q47B]("http://www.geeksforgeeks.org/wp-content/uploads/gq/2014/11/GATECS2009Q47B.png"){kind=small}
(A)
1
(B)
2
(C)
3
(D)
4
Answer
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