Difference between Write invalidate protocol & Write Update Protocol (Bus-Snooping )

Prerequisite –  Cache Coherence

Cache Coherence :
In multi-processor systems, each processor can have its own cache & when processors are allowed to update data of their individual cache’s block, data will be in an inconsistent state. This problem is called cache coherence.

Cache Coherence protocol :
To keep the data consistent, cache coherence protocols are used. These protocols update cache copies in the multiprocessor systems. In bus – snooping mechanisms , processors snoop (monitoring) the bus and take appropriate action on relevant events (data update) to ensure the data consistency. 

The 2 protocols that are usually used to update cache copies are –

1. Write-update protocol
2. Write-invalidate protocol

Write-update protocol :
Using this protocol,if a processor updates its cache data, it immediately updates all the other cached copies also. The broadcast mechanism is used to send the new data block to all the cache having the copies.

Write-invalidate protocol :
Here, the immediate sending of the updated cache block to the other cache is not done. Simply, an invalidate command is sent to all the other cache copies & also to the original version in the shared memory so that all of their copies of data become invalid. It is denoted by ‘I’ and I specifies  invalid / dirty data. 

If now any other processor (other than the updating processor which updated its cache data) wants to read the data (cache copy) , the updating processor provides it the updated data. The write-invalidate approach is used in multiprocessor systems, such as the Pentium 4 and PowerPC. 

Difference between Write invalidate protocol & Write Update Protocol :

	Write invalidate protocol	Write Update Protocol
1.	One initial invalidation is required when multiple writes to the same word is done with no intervening reads.	Multiple write broadcasts are required when multiple writes to the same word is done with no read is done in between.
2.	With multiword cache blocks, only the first write to any of the word in the block need to generate an invalidate. This protocol works on cache blocks.	A write broadcast is required when each word is written in a cache block with multiword cache blocks. This protocol works on individual words.(bytes)
3.	Longer time is taken (by the other non-updating processor)  because any read to invalidate data requires you to fetch a new copy of data from the updating processor(its cache has updated data).	Less time is taken to read the data because the data written by the updating processor is immediately updated in another cache as well. (reading processor should have a data copy beforehand) (Although updating all the cache copies may take some time initially)
4.	Since the written data is not instantly updated in the reader’s cache, the delay between writing a word in one processor and reading the written value in another processor is larger than the write Update.	Since the written data is instantly updated in the reader’s cache, the delay between writing a word in one processor and reading the written value in another processor is normally shorter in a write update scheme.
5.	Updated data is given to the processor who requires it.	Updated data is given to the processors who contain the same cache block copy that was updated.
6.	Whenever a processor modifies data frequently, updated data is sent to the processor who requires it. No need to broadcast again & again after every modification in the data.	Whenever a processor modifies data frequently, for every modification, write broadcast is required to be done . Write broadcast is done as many times as modifications are done.