Reduced Set Instruction Set Architecture (RISC) –
The main idea behind is to make hardware simpler by using an instruction set composed of a few basic steps for loading, evaluating and storing operations just like an addition command will be composed of loading data, evaluating and storing.
Complex Instruction Set Architecture (CISC) –
The main idea is to make hardware complex as a single instruction will do all loading, evaluating and storing operations just like a multiplication command will do stuff like loading data, evaluating and storing it.
Both approaches try to increase the CPU performance
- RISC: Reduce the cycles per instruction at the cost of the number of instructions per program.
- CISC: The CISC approach attempts to minimize the number of instructions per program but at the cost of increase in number of cycles per instruction.
Earlier when programming was done using assembly language, a need was felt to make instruction do more task because programming in assembly was tedious and error prone due to which CISC architecture evolved but with uprise of high level language dependency on assembly reduced RISC architecture prevailed.
Characteristic of RISC –
- Simpler instruction, hence simple instruction decoding.
- Instruction come under size of one word.
- Instruction take single clock cycle to get executed.
- More number of general purpose register.
- Simple Addressing Modes.
- Less Data types.
- Pipeling can be achieved.
Characteristic of CISC –
- Complex instruction, hence complex instruction decoding.
- Instruction are larger than one word size.
- Instruction may take more than single clock cycle to get executed.
- Less number of general purpose register as operation get performed in memory itself.
- Complex Addressing Modes.
- More Data types.
Example – Suppose we have to add two 8-bit number:
- CISC approach: There will be a single command or instruction for this like ADD which will perform the task.
- RISC approach: Here programmer will write first load command to load data in registers then it will use suitable operator and then it will store result in desired location.
So, add operation is divided into parts i.e. load, operate, store due to which RISC programs are longer and require more memory to get stored but require less transistors due to less complex command.
|Focus on software||Focus on hardware|
|Transistors are used for more registers||Transistors are used for storing complex
|Code size is large||Code size is small|
|A instruction execute in single clock cycle||Instruction take more than one clock cycle|
|A instruction fit in one word||Instruction are larger than size of one woed|
- Microprocessors: RISC and CISC | Set 2
- Computer Organization | General Register based CPU Organization
- Computer Organization | Stack based CPU Organization
- Computer Organization | Basic Computer Instructions
- Computer Organization | Performance of Computer
- Computer Organization | RAM vs ROM
- Computer Organization | MPU Communication
- Computer Organization | BUS Arbitration
- Computer Organization | Memory Banking
- Computer Organization | Microcomputer system
- Computer Organization | ALU and Data Path
- Computer Organization | Micro-Operation
- Computer Organization | Von Neumann architecture
- Computer Organization | Different Instruction Cycles
- Computer Organization | Booth's Algorithm
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