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Circuit (Combinational and Sequential) Implementation using Prolog

  • Last Updated : 31 May, 2021

Prerequisite – Prolog | An Introduction

Overview :
Digital circuits or digital electronics is a branch of electronics which deals with digital signals to perform the various task to meet various requirement. The input signal applied to these circuits is of digital form, which is represented in 0’s and 1’s binary language format. These circuits are designed by using logical gates like AND, OR, NOT, NANAD, NOR, XOR gates which perform logical operations. This representation helps the circuit to switch from one state to another for providing precise output. Digital circuit systems are mainly designed to overcome the disadvantage of analog systems which are slower and the output data which is obtained may contain an error. There are two types of digital circuits Combinational Circuit and Sequential Circuit.

Implementation using Prolog :
Prolog is a logical and declarative programming language. The name itself, Prolog, is short for Programming in Logic.

Example :
Here the question arises, how do we depict a circuit in a prolog code. Consider the following circuit diagram.



There are 3 inputs in the circuit diagram, A, B, and C. We will consider and pass the above circuit diagram as a prolog code in the following line of code as follows.

circuit1(A,B,C,Q,R):-
    not(A,T1),
    and(A,B,T2),
    nand(T1,T2,T3),
    xnor(T3,C,T4),
    dff(T4,Q,R).

Description :
Here Q and R are the output variables. T1- T4 are the instance values or outputs of the in-between gates. The logic gates which has been used are:- NOT, AND, NAND, and XNOR gate. There is one D-FLIP FLOP and 2 outputs Q and Q’. We will consider the truth tables as facts and the circuit diagram as rules in prolog, As written in the following code.

Note –
In the following code, the truth tables are written for g-prolog. In swi-prolog, the truth tables are predefined.

Code implementation :
Here, we will implement the logic and will write the code in prolog.

Step-1 : 
Here, we will implement the truth tables of all logic gates for 2 inputs A and B. 

% Made by - Maninder kaur 
% Following are the truth tables of all logic gates for 2 inputs A and B.

and(0,0,0).
and(0,1,0).
and(1,0,0).
and(1,1,1).

or(0,0,0).
or(0,1,1).
or(1,0,1).
or(1,1,1).

not(0,1).
not(1,0).

nand(0,0,1).
nand(0,1,1).
nand(1,0,1).
nand(1,1,0).

nor(0,0,1).
nor(0,1,0).
nor(1,0,0).
nor(1,1,0).

xor(0,0,0).
xor(0,1,1).
xor(1,0,1).
xor(1,1,0).

xnor(0,0,1).
xnor(0,1,0).
xnor(1,0,0).
xnor(1,1,1).

Step-2 :
Here, we will implement the truth tables of OR GATE for 4 inputs A, B, C and D.

% Following is the truth tables of OR GATE for 4 inputs A ,B ,C and D.
% (Used in 8X3 Encoder)

or4(0,0,0,0,0).
or4(0,0,0,1,1).
or4(0,0,1,0,1).
or4(0,0,1,1,1).
or4(0,1,0,0,1).
or4(0,1,0,1,1).
or4(0,1,1,0,1).
or4(0,1,1,1,1).
or4(1,0,0,0,1).
or4(1,0,0,1,1).
or4(1,0,1,0,1).
or4(1,0,1,1,1).
or4(1,1,0,0,1).
or4(1,1,0,1,1).
or4(1,1,1,0,1).
or4(1,1,1,1,1).

Step-3 :
Here, we will implement the Half adder.

% HALF ADDER :-
% INPUT VARIABLES - A,B,C
% OUTPUT VARIABLES - S ,Ca(Sum and Carry)

half_adder(A,B,S,Ca):-
    xor(A,B,S),
    and(A,B,Ca).

Step-4 :
Here, we will implement the Full adder.



%FULL ADDER :-
%INPUT VARIABLES - A,B,C
%OUTPUT VARIABLES - S ,Ca (Sum and Carry)

full_adder(A,B,C,S,Ca):-
     xor(A,B,T1),
    xor(C,T1,S),
    and(T1,C,T2),
    and(A,B,T3),
    or(T3,T2,Ca).

Step-5 :
Here, we will implement the Half Subtractor.

%    HALF SUBTRACTOR :-
%    INPUT VARIABLES - A,B
%    OUTPUT VARIABLES - D ,BO (Difference and borrow)

half_sub(A,B,D,BO):-
    xor(A,B,D),
    not(A,T1),
    and(B,T1,BO).

Step-6 :
Here, we will implement the full subtractor.

% FULL SUBTRACTOR :-
% INPUT VARIABLES - A,B
% OUTPUT VARIABLES - D ,BO (Difference and borrow)

full_sub(A,B,BI,D,BO) :-
    xor(A,B,T1),
    xor(T1,BI,D),
    not(T1,T2),
    not(A,T3),
    nand(T2,BI,T4),
    nand(T3,B,T5),
    nand(T4,T5,BO).

Step-7 :
Now, we will implement the 2 × 4 DECODER.

% 2 X 4 DECODER
% INPUT VARIABLES - A,B
% OUTPUT VARIABLES - D0,D1,D2,D3

decoder_2x4(A,B,D0,D1,D2,D3):-
    not(A,A_0),
    not(B,B_0),
    and(A_0,B_0,D0),
    and(A_0,B,D1),
    and(A,B_0,D2),
    and(A,B,D3).

Step-8 :
Now, we will implement the 3 × 8 DECODER.

% 3 X 8 ENCODER
% OUTPUT VARIABLES - A,B
% INPUT VARIABLES - D0,D1,D2,D3,D4,D5,D6,D7

encoder_8x3(_,D1,D2,D3,D4,D5,D6,D7,A,B,C):-
    or4(D1,D3,D5,D7,A),
    or4(D2,D3,D6,D7,B),
    or4(D4,D5,D6,D7,C).

Step-9 :
Now, we will implement the 2 X 1 MULTIPLEXER.

% 2 X 1 MULTIPLEXER
% INPUT VARIABLES - A,B,S (Selector)
% OUTPUT VARIABLES - Z

mux_2x1(A,B,S,Z):-
    not(S,S1),
    and(A,S1,I0),
    and(B,S,I1),
    or(I0,I1,Z).

Step-10 :
Now, we will implement the 1 × 2 DEMULTIPLEXER.

% 1 X 2 DEMULTIPLEXER
% INPUT VARIABLES - I (Input) ,S (Selector)
% OUTPUT VARIABLES - A,B

demux_1x2(I,S,A,B):-
    not(S,S_0),
    and(I,S_0,A),
    and(I,S,B).

Step-11 :
Now, we will implement the 1 × 4 DEMULTIPLEXER.

% 1 X 4 DEMULTIPLEXER
% INPUT VARIABLES - I (Input) ,S0 and S1(Selectors)
% OUTPUT VARIABLES - A,B,C,D

demux_1x4(I,S0,S1,A,B,C,D):-
    decoder_2x4(S0,S1,T0,T1,T2,T3),
    and(I,T0,A),
    and(I,T1,B),
    and(I,T2,C),
    and(I,T3,D).

Step-12 :
Now, we will implement the D FLIP FLOP.

% D FLIP FLOP TRUTH TABLE

dff(0,0,1).
dff(1,1,0).

Step-13 :
Now, we will implement the circuit code.

% CIRCUITS

circuit1(A,B,C,Q,R):-
    not(A,T1),
    and(A,B,T2),
    nand(T1,T2,T3),
    xnor(T3,C,T4),
    dff(T4,Q,R).

Output :

  

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