Distributed Shared Memory (DSM) implements the distributed systems shared memory model in a distributed system, that hasn’t any physically shared memory. Shared model provides a virtual address area shared between any or all nodes. To beat the high forged of communication in distributed system. DSM memo, model provides a virtual address area shared between all nodes. systems move information to the placement of access. Information moves between main memory and secondary memory (within a node) and between main recollections of various nodes.
Every Greek deity object is in hand by a node. The initial owner is that the node that created the object. possession will amendment as the object moves from node to node. Once a method accesses information within the shared address space, the mapping manager maps shared memory address to physical memory (local or remote).
DSM permits programs running on separate reasons to share information while not the software engineer having to agitate causation message instead underlying technology can send the messages to stay the DSM consistent between compute. DSM permits programs that wont to treat constant laptop to be simply tailored to control on separate reason. Programs access what seems to them to be traditional memory.
Hence, programs that Pine Tree State DSM square measure sometimes shorter and easier to grasp than programs that use message passing. But, DSM isn’t appropriate for all things. Client-server systems square measure typically less suited to DSM, however, a server is also wont to assist in providing DSM practicality for information shared between purchasers.
Architecture of Distributed Shared Memory (DSM) :
Every node consists of 1 or additional CPU’s and a memory unit. High-speed communication network is employed for connecting the nodes. A straightforward message passing system permits processes on completely different nodes to exchange one another.
Memory mapping manager unit :
Memory mapping manager routine in every node maps the native memory onto the shared computer storage. For mapping operation, the shared memory house is divided into blocks.
Information caching may be a documented answer to deal with operation latency. DMA uses information caching to scale back network latency. the most memory of the individual nodes is employed to cache items of the shared memory house.
Memory mapping manager of every node reads its native memory as an enormous cache of the shared memory house for its associated processors. The bass unit of caching may be a memory block. Systems that support DSM, information moves between secondary memory and main memory also as between main reminiscences of various nodes.
Communication Network Unit :
Once method access information within the shared address house mapping manager maps the shared memory address to the physical memory. The mapped layer of code enforced either within the operating kernel or as a runtime routine.
Physical memory on every node holds pages of shared virtual–address house. Native pages area unit gift in some node’s memory. Remote pages in some other node’s memory.
Attention reader! Don’t stop learning now. Get hold of all the important CS Theory concepts for SDE interviews with the CS Theory Course at a student-friendly price and become industry ready.
- Computer Organization and Architecture | Pipelining | Set 1 (Execution, Stages and Throughput)
- Computer Organization and Architecture | Pipelining | Set 3 (Types and Stalling)
- Computer Organization and Architecture | Pipelining | Set 2 (Dependencies and Data Hazard)
- Hardware architecture (parallel computing)
- Computer Architecture | Flynn's taxonomy
- Computer Organization | Von Neumann architecture
- Differences between Computer Architecture and Computer Organization
- Microarchitecture and Instruction Set Architecture
- Architecture of 8086
- UltraSPARC Architecture
- SIC/XE Architecture
- PowerPC Architecture
- VAX Architecture
- Cray T3E Architecture
- Pentium Pro Architecture
- Difference between Fine-Grained and Coarse-Grained SIMD Architecture
- The Three-Level ANSI-SPARC Architecture
- Memory Organisation in Computer Architecture
- Harvard Architecture
- Pipelined architecture with its diagram
If you like GeeksforGeeks and would like to contribute, you can also write an article using contribute.geeksforgeeks.org or mail your article to email@example.com. See your article appearing on the GeeksforGeeks main page and help other Geeks.
Please Improve this article if you find anything incorrect by clicking on the "Improve Article" button below.