In an instruction execution pipeline, the earliest that the data TLB (Translation Lookaside Buffer) can be accessed is
(A) before effective address calculation has started
(B) during effective address calculation
(C) after effective address calculation has completed
(D) after data cache lookup has completed


Answer: (B)

Explanation: When we calculate effective address, first of all we access TLB to access the Frame number.

Logical address generated by CPU breaks in two parts : page number and page offset, for faster accessing of data we place some page table entries in a small hardware TLB whose access time is same as cache memory. So initially when page no. is mapped to find the corresponding frame no., first it is look up in TLB and then in page-table (in case if TLB miss).

During effective address calculation TLB is accessed.

So (B) is correct option.

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