Consider a machine with a 2-way set associative data cache of size 64 Kbytes and block size 16 bytes. The cache is managed using 32 bit virtual addresses and the page size is 4 Kbytes. A program to be run on this machine begins as follows:

double ARR[1024][1024];
int i, j;

// Initialize array ARR to 0.0
for(i = 0; i < 1024; i++) for(j = 0; j < 1024; j++) ARR[i][j] = 0.0; [/sourcecode] The size of double is 8 Bytes. Array ARR is located in memory starting at the beginning of virtual page 0xFF000 and stored in row major order. The cache is initially empty and no pre-fetching is done. The only data memory references made by the program are those to array ARR. The total size of the tags in the cache directory is (A) 32 Kbits
(B) 34 Kbits
(C) 64 Kbits
(D) 68 Kbits


Answer: (D)

Explanation: Virtual Address = 32 bits
Cache address is of the form: TAG | SET | BLOCK
For BLOCK of 16 bytes, we need 4 bits.
Total number of sets(each set containing 2 Blocks) = 64 KB / (2 * 16) B = 2¹¹
So, Number of SET bits = 11
Number of TAG bits = 32 – (11 + 4) = 17
 
Thus, cache address = 17 | 11 | 4 (TAG | SET | BLOCK)
Tag memory size = Number of tag bits * Total number of blocks
= 17 * 2 * 2¹¹ (Total Number of blocks = 2 * Total number of sets)
= 68 KB
 
Thus, D is the correct choice.

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