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Stop and Wait ARQ

Last Updated : 08 Jun, 2023
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Characteristics

  • Used in Connection-oriented communication.
  • It offers error and flows control
  • It is used in Data Link and Transport Layers
  • Stop and Wait for ARQ mainly implements the Sliding Window Protocol concept with Window Size 1

Useful Terms:

  • Propagation Delay: Amount of time taken by a packet to make a physical journey from one router to another router.

Propagation Delay = (Distance between routers) / (Velocity of propagation)

  • RoundTripTime (RTT) = Amount of time taken by a packet to reach the receiver + Time taken by the Acknowledgement to reach the sender 
  • TimeOut (TO) =  2* RTT
  • Time To Live (TTL) = 2* TimeOut. (Maximum TTL is 255 seconds)

Simple Stop and Wait

Sender:

Rule 1) Send one data packet at a time. 
Rule 2) Send the next packet only after receiving acknowledgement for the previous. 
 

Receiver:

Rule 1) Send acknowledgement after receiving and consuming a data packet. 
Rule 2) After consuming packet acknowledgement need to be sent (Flow Control) 

  
 

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Problems :

1. Lost Data 
 

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2. Lost Acknowledgement: 
 

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3. Delayed Acknowledgement/Data: After a timeout on the sender side, a long-delayed acknowledgement might be wrongly considered as acknowledgement of some other recent packet. 

 

Stop and Wait for ARQ (Automatic Repeat Request)

The above 3 problems are resolved by Stop and Wait for ARQ (Automatic Repeat Request) that does both error control and flow control. 
 

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1. Time Out: 
 

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2. Sequence Number (Data) 
 

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3. Delayed Acknowledgement: 
This is resolved by introducing sequence numbers for acknowledgement also. 
 

Working of Stop and Wait for ARQ:

1) Sender A sends a data frame or packet with sequence number 0. 
2) Receiver B, after receiving the data frame, sends an acknowledgement with sequence number 1 (the sequence number of the next expected data frame or packet) 
There is only a one-bit sequence number that implies that both sender and receiver have a buffer for one frame or packet only. 

 

stopAndWaitARQ

 

Characteristics of Stop and Wait ARQ:

  • It uses a link between sender and receiver as a half-duplex link
  • Throughput = 1 Data packet/frame per  RTT
  • If the Bandwidth*Delay product is very high, then they stop and wait for protocol if it is not so useful. The sender has to keep waiting for acknowledgements before sending the processed next packet.
  • It is an example of “Closed Loop OR connection-oriented “ protocols
  • It is a special category of SWP where its window size is 1
  • Irrespective of the number of packets sender is having stop and wait for protocol  requires only  2 sequence numbers 0 and 1

Constraints:

Stop and Wait ARQ has very less efficiency , it can be improved by increasing the window size. Also , for better efficiency , Go back N and Selective Repeat Protocols are used.

The Stop and Wait ARQ solves the main three problems but may cause big performance issues as the sender always waits for acknowledgement even if it has the next packet ready to send. Consider a situation where you have a high bandwidth connection and propagation delay is also high (you are connected to some server in some other country through a high-speed connection). To solve this problem, we can send more than one packet at a time with a larger sequence number. We will be discussing these protocols in the next articles. 

So Stop and Wait ARQ may work fine where propagation delay is very less for example LAN connections but performs badly for distant connections like satellite connections. 

Advantages of Stop and Wait ARQ :

  • Simple Implementation: Stop and Wait ARQ is a simple protocol that is easy to implement in both hardware and software. It does not require complex algorithms or hardware components, making it an inexpensive and efficient option.
  • Error Detection: Stop and Wait ARQ detects errors in the transmitted data by using checksums or cyclic redundancy checks (CRC). If an error is detected, the receiver sends a negative acknowledgment (NAK) to the sender, indicating that the data needs to be retransmitted.
  • Reliable: Stop and Wait ARQ ensures that the data is transmitted reliably and in order. The receiver cannot move on to the next data packet until it receives the current one. This ensures that the data is received in the correct order and eliminates the possibility of data corruption.
  • Flow Control: Stop and Wait ARQ can be used for flow control, where the receiver can control the rate at which the sender transmits data. This is useful in situations where the receiver has limited buffer space or processing power.
  • Backward Compatibility: Stop and Wait ARQ is compatible with many existing systems and protocols, making it a popular choice for communication over unreliable channels.

Disadvantages of Stop and Wait ARQ :

  • Low Efficiency: Stop and Wait ARQ has low efficiency as it requires the sender to wait for an acknowledgment from the receiver before sending the next data packet. This results in a low data transmission rate, especially for large data sets.
  • High Latency: Stop and Wait ARQ introduces additional latency in the transmission of data, as the sender must wait for an acknowledgment before sending the next packet. This can be a problem for real-time applications such as video streaming or online gaming.
  • Limited Bandwidth Utilization: Stop and Wait ARQ does not utilize the available bandwidth efficiently, as the sender can transmit only one data packet at a time. This results in underutilization of the channel, which can be a problem in situations where the available bandwidth is limited.
  • Limited Error Recovery: Stop and Wait ARQ has limited error recovery capabilities. If a data packet is lost or corrupted, the sender must retransmit the entire packet, which can be time-consuming and can result in further delays.
  • Vulnerable to Channel Noise: Stop and Wait ARQ is vulnerable to channel noise, which can cause errors in the transmitted data. This can result in frequent retransmissions and can impact the overall efficiency of the protocol.

  
References: 

This Article is contributed by G. Shabharesh.


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